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NOP is a pseudoinstruction. Write the instruction that it uses to implements its purpose (do nothing).
NOP is 'n pseudo-instruksie. Skryf die instruksie wat dit gebruik om sy funksie te implementeer (doen niks).
Assume you have a C code called myProgram.c, which you wish to compile with the GNU Code Compiler (GCC). Write the command to compile and assemble the C file without optimisation, generating a myProgram.o file.
Aanvaar dat jy 'n C-kode het genoem myProgram.c, wat jy met die "GNU Code Compiler "GCC" kompileer. Skryf die bevel om die C-kode te compile en assemble, sonder optimering, wat 'n myProgram.o lêer genereer.
Translate the following machine code to ARM Assembly instructions. Vertaal die volgende masjienkode na ARM saamsteltaal-instruksies.
1. 0x01A0F00E
2. 0xE3760008
3. 0x10912000
4. 0xE40D3008
5. 0xC027C00A
Please answer all parts of the question.Translate the following machine code to ARM Assembly instructions. Vertaal die volgende masjienkode na ARM saamsteltaal-instruksies.
1. 0x01A0F00E
2. 0xE3760008
3. 0x10912000
4. 0xE40D3008
5. 0xC027C00A
Translate the following ARM Assembly instructions to machine code. Give your answer in hexadecimal, and specify all 32-bits of the instruction.Vertaal die volgende ARM saamsteltaal-instruksies na masjienkode. Gee jou antwoord in heksadesimaal, en spesifiseer al 32-bisse van die instruksie.
1. LDR R3, [R1,#128]
0x
2. STR R3, [R2], R4, ROR #16
0x
3. LDR R1, [R8], #15
0x
For the following instructions, assume that the address of the branch instruction is 0x14000 and the address of TARGET is 0x14040: Vir die volgende instruksies, aanvaar dat die adres van die "branch"-instruksie is 0x14000 en die adres van TARGET is 0x14040:
4. BNE TARGET
0x
5. BLPL TARGET
0x
Translate the following ARM Assembly instructions to machine code. Give your answer in hexadecimal, and specify all 32-bits of the instruction.Vertaal die volgende ARM saamsteltaal-instruksies na masjienkode. Gee jou antwoord in heksadesimaal, en spesifiseer al 32-bisse van die instruksie.
1. ADD R0,R1,#42
0x
2. MOV R1,R0
0x
3. SUBEQ R1,R0,#4
0x
4. RSB R1,R4,R2,LSL #3
0x
5. ORRHS R7,R5,R3,ASR #1
0x
Describe the contents of register R1 (initialized to 0) after the following instructions complete, assuming that memory contains the values shown below. Register R0 contains 0x24, and the memory system is little-endian.Beskryf die inhoud van R1 (aanvanklik gelyk aan 0) nadat die volgende instruksies uitgevoer het. Neem aan dat die geheue geinitialiseer na die inhoud hieronder. Register R0 bevat die waarde 0x24 en die geheue greep-volgorde is mins-beduidende greep by laagste adres posisie (klein endiaan).
Address/adres Contents/Inhoud0x24 0x340x25 0xEE0x26 0x1A0x27 0xFF
Give your answer in hexadecimal (use capitals and DO NOT INCLUDE THE 0x), and specify all 32-bits of R1. / Gee jou antwoord in heksadesimaal (gebruik hoofletters en MOENIE 0x insluit nie), en spesifiseer al 32-bisse van R1
1. STR R1, [R0, #4]
0x
2. LDR R1, [R0]
0x
3. LDRB R1, [R0, #2]
0x
4. LDRB R1, [R0]
0x
Consider the following schematic of an Arithmetic and Logic Unit (ALU)
Beskou die volgende diagram van ‘n Rekenkunde-en-logika-eenheid (ALU):
Assume that N = 4, in other words, an ALU with 4-bit inputs and outputs / Aanvaar dat N = 4, m.a.w. ‘n ALU met 4-bis intrees en uittrees.
a) Complete the follow table / Voltooi die volgende tabel:
A | B | ALUcontrol | N | C | Z | V | Result bit R3 | Result bit R2 | Result bit R1 | Result bit R0 |
0101 | 1001 | 00 | ||||||||
1100 | 1011 | 01 | ||||||||
0101 | 1101 | 10 | ||||||||
1010 | 0010 | 11 |
Consider the following schematic of an Arithmetic and Logic Unit (ALU)
Beskou die volgende diagram van ‘n Rekenkunde-en-logika-eenheid (ALU):
Assume that N = 4, in other words, an ALU with 4-bit inputs and outputs / Aanvaar dat N = 4, m.a.w. ‘n ALU met 4-bis intrees en uittrees.
a) Complete the follow table / Voltooi die volgende tabel:
A | B | ALUcontrol | N | C | Z | V | Result bit R3 | Result bit R2 | Result bit R1 | Result bit R0 |
0101 | 1001 | 00 | ||||||||
1100 | 1011 | 01 | ||||||||
0101 | 1101 | 10 | ||||||||
1010 | 0010 | 11 |
Consider the following 4x4 memory array / Beskou die volgende 4x4 geheue skikking:
Address | Bitcell 3 | Bitcell 2 | Bitcell 1 | Bitcell 0 |
11 | 1 | 0 | 1 | 1 |
10 | 1 | 1 | 0 | 0 |
01 | 1 | 1 | 1 | 1 |
00 | 0 | 1 | 0 | 0 |
Draw the schematic of this memory array using a 2-to-4 decoder and ROM blocks for each bitcell. Clearly show the connections of the wordlines and bitlines to each bitcell and the contents of each bitcell.
Teken die diagram van hierdie geheue skikking met die gebruik van ‘n 2-na-4 dekodeerder en ROM-blokke vir elk bis-sel. Vertoon duidelik die verbindings van die woordlyne en bislyne met elke bis-sel en die fisiese inhoud van elke bis-sel.
Did you place the transistors where the bit was 0 or 1? / Het jy die transistors geplaas waar die bis 0 of 1 is?
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