A multi-level page table enables faster address translation than a linear page table.

A linear page table can map more memory addresses than a multi-level page table.

A multi-level page table consumes more space than a linear page table.

A multi-level page table consumes less space than a linear page table.

The 3 most significant bits of a virtual memory address represent the virtual page number.

The 4 least significant bits of a virtual memory address represent the offset.

Virtual memory address 0b0 maps to physical memory address 0b0.

Virtual memory address 0b1 maps to physical memory address 0b1010.

The 6 most significant bits of a physical memory address represent the frame number.

Each process can have 2^10 = 1024 pages.

Each page fits 2^6 = 64 bytes.

Each frame fits 2^6 = 64 bytes.

Virtual memory address 0b1000000001100001 may map to physical memory address 0b1100101101111000.

Virtual memory address 0b0 necessarily maps to physical memory address 0b0.

Virtual memory address 0b1 necessarily maps to the second byte of a frame.

Each process's memory image must fit within 2^6=64 bytes.

A frame is a fixed-size chunk of physical memory.

The bigger the page size, the worse the problem of internal fragmentation.

A page is a fixed-size chunk of a process's virtual address space.

A page is a fixed-size chunk of the computer's physical address space.

The smaller the page size, the worse the problem of internal fragmentation.

P1 may be able to read and/or modify P2's data.

P1 may change the values that have been pushed into P2's stack, causing P2 to pop the wrong values from the stack.