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Consider an instruction which copies the content of operand 2 (OP2) into operand 1 (OP1):
MV OP1, OP2
with binary code:
OpCode (MV)
|
OP1
|
OP2
| |||||||||||||
15
|
14
|
13
|
12
|
11
|
10
|
9
|
8
|
7
|
6
|
5
|
4
|
3
|
2
|
1
|
0
|
0
|
1
|
0
|
1
|
0
|
1
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
1
|
0
|
0
|
Consider the following addressing modes for operand 2 (OP2) :
The memory and register file content is given in the tables:
Memory
|
Register file
| |||
memory position |
Content
|
|
Register
|
Content
|
0
|
9
|
R0
|
19
| |
1
|
5
|
R1
|
-1
| |
2
|
13
|
R2
|
1
| |
3
|
4
|
R3
|
2
| |
4
|
5
|
R4
|
1
| |
5
|
10
|
R5
|
16
| |
6
|
14
|
R6
|
16
| |
7
|
5
|
R7
|
16
| |
...
|
...
|
...
|
...
|
give the values that are loaded into operand 1 (read from operand 2) according to the following addressing modes for operand 2:
Addressing mode of OP2
|
Value to give to OP1 (from OP2)
|
Immediate
| |
Direct to Register
| |
Direct to Memory
|
|
Indirect Register Memory
|
|
Indirect Memory Memory
| |
Relative to register R1
|
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